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AXP202 DATASHEET PDF

AXP comprises an adaptive USB-Compatible PWM charger, 2 BUCK DC-DC converters, 5 LDOs, multiple bit ADCs of Voltage, current and temperature. AXP Datasheet, AXP PDF, AXP Data sheet, AXP manual, AXP pdf, AXP, datenblatt, Electronics AXP, alldatasheet, free, datasheet. AXP datasheet, AXP circuit, AXP data sheet: ETC2 – Single Cell Li- Battery PWM Charger and Power System Management IC,alldatasheet.

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Battery activation mode may indicate that the battery is faulty. This axp022 is entered either from pre-charge mode or constant current mode under certain conditions. In battery activate mode, the charger always inputs relatively low current to batteries.

(PDF) AXP202 Datasheet download

The actual charge current is equal to the desired current; 1: As long as the external power supply, battery or battery backup certain power exists, this data will be kept, not affected by the switch machine. The AXP interrupt system has 2 bits for every interrupt, offset by 8 bytes.

The first bit is to enable or disable mask an interrupt, the second bit, 8 bytes later, is to indicate the interrupt state, e. Additionally, the interrupt status bit is also used to clear the interrupt, so that it can fire again. For example, register 0x40 bit 7, ACIN Over-voltage, can be enabled or disabled by writing a 1 into bit 7 of reg 0x When an interrupt is fired and the interrupt line datqsheet pulled low, bit 7 of 0x48 will be set to 1.

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To clear ax202 interrupt, write a 1 into bit 7 of 0x Retrieved from ” http: Personal tools Create account Log in. Views Acp202 View source View history. This page was last modified on 2 Marchat This page has been accessed 68, times. Content is available under Creative Commons Attribution datasheft otherwise noted.

Privacy policy About linux-sunxi. Power input status 8.

AXP Datasheet, PDF – Alldatasheet

Power operating mode and charge status indication 8. AXP Chip Version 8.

Power output control 8. DC-DC2 output voltage setting 8. DC-DC3 output voltage setting 8.

File:AXP Datasheet v –

LDO3 output voltage settings 8. V OFF – Shutdown voltage setting 8. Spare dataaheet charging control 8. PEK key parameter settings 8.

DC-DC operating frequency is set 8. V LTF-charge Charging the battery temperature threshold set 8. V HTF-charge Battery charging high temperature threshold settings 8. V LTF-discharge Battery discharge temperature threshold set 8.

V HTF-discharge Battery discharge high temperature threshold settings 8. DC-DC mode selection 8. ADC Enable 1 8. ADC Enable 2 8. ADC sample rate settings, the TS pin control 8. ADC input range 8. GPIO0 feature set 8.

GPIO1 feature set 8. GPIO2 feature set 8. Interrupt bank 1; Input power 8. Interrupt bank 2; Battery 8. Interrupt bank 3 8.

Interrupt bank 4 8. Interrupt bank 5 8.

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Coulomb Counter Control 8. Indicates that the battery current direction 0: The battery is charged.

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The battery state of existence indicates 0: Indicates whether the battery into the active mode 0: Indicate the charging current is less than the desired current 0: LDO3 voltage rate control 1: The datasheet is incorrect here. DC-DC2 voltage rate control 1: LDO4 output voltage settings 1.

LDO mode, the voltage is set by the [6: LDO3 output voltage setting Bit6-Bit0 0. VBUS current limit control open time dataheet stream selection Open After writing this bit automatically cleared each into Sleep mode again write 1. Charging the end of the current set 0: The constant current mode timeout setting Bit Key long when you grew up in the shutdown automatic shutdown feature set 0: TS pin function selection 0: TS pin current output settings On when charging On when ADC enabled Discharge VBUS discharge feature set 0: Close VBUS axxp202 resistor; 1: Charge VBUS charge feature set 0: Disconnect VBUS charge resistor; 1: GPIO output low GPIO output high 3.

Battery charging in activation mode. Battery is no longer charging in activation mode. Coulomb Counter pause control, the write will be suspended Coulomb counting while this bit is cleared from. The clear Coulomb Counter control bit write Coulomb Counter will be cleared while this bit is cleared from.